1. Field of the Invention
The present invention relates to a flat type display device employing liquid crystals, plasma, a thin film EL (Electro Luminescence), or the like driven through scanning of its display screen, such as a matrix type liquid crystal display device. It further relates to a driving method and an assembling method for the display device.
2. Description of the Prior Art
FIG. 1 shows a conventional thin film transistor (TFT) matrix type liquid crystal display device. The liquid crystal display device is constructed by arranging in a matrix form unit cells each composed of a pixel P and a thin film transistor T, one terminal of which is connected to the pixel P. The gates of the thin film transistors T, T, . . . are connected to a scanning conductor line 8 in every row and the other terminals of the above-mentioned thin film transistors T, T, . . . are connected to a display conductor line 14 in every column. Output signals at scanning signal output terminals 6, 6, . . . of scanning drive LSI's (not shown) and output signals at display signal output terminals 12, 12, . . . of display drive LSI's (not shown) are supplied to the scanning conductor lines 8, 8, . . . and to the display conductor lines 14, 14, . . .
In general, an output signal at one scanning signal output terminal 6 of a scanning signal is supplied to one scanning conductor line 8, as shown in FIG. 1. Therefore, for example, when 240 scanning conductor lines 8 are driven, the scanning drive LSI's are required to produce the same number of output signals, i.e., 240 output signals. In this case, when an LSI which produces 60 output signals is selected, four LSIs are to be provided. When an LSI which produces 80 output signals is selected, three LSIs are to be provided. When an LSI which produces 120 output signals is selected, two LSIs are to be provided.
Lately, flat type display devices such as liquid crystal display devices, have been in strong underselling competition, and therefore cost reduction has been a serious problem. Among others, the drive LSIs (scanning drive LSIs and display drive LSIs) are expensive and provide a great part of the total cost of the liquid crystal display device. Therefore the LSIs are the key parts for cost reduction.
In view of the above-mentioned fact, there have been trials to reduce chip size by making the pitch of output terminals finer or by increasing the number of output terminals per drive LSI to reduce the number of LSIs for the purpose of reducing the costs of the drive LSIs. However, none of the above-mentioned trials have been able to achieve sufficient cost reduction, rather, it is possible to lower the yield and reliability because a lot of terminals must be connected at a fine pitch on the board of the liquid crystal display device. The above-mentioned fact is common to devices such as simple-matrix display devices where its display signal system is scanned by means of a drive LSI.
FIG. 2 shows another display device wherein ramification conductor lines A, B, C, and D, one end of each ramification conductor line being connected to a scanning signal output terminal 6 and the other end thereof ramifying into n branches, are provided, and a three-terminal transistors SW.sub.11 to SW.sub.n4 are provided between the branches and corresponding scanning conductor lines G(1) through G(n) (Japanese Patent Publication No. 5-14915). The corresponding branches of the ramification conductor lines constitute a group, thus n groups of the branches are provided. FIG. 3 shows the waveforms of control signals for the display device shown in FIG. 2. In the display device of FIG. 2, n control conductor lines E(1) through E(n) connected to the gates of the transistors SW.sub.11 -SW.sub.n4 are sequentially selected (electric potential is made to be positive (+V)) to sequentially select the groups of the branches, and the ramification conductor lines A, B, C, and D are sequentially selected when each group of the branches is selected to thereby select the corresponding scanning conductor lines in each group as shown in FIG. 3. With the above-mentioned operation, the scanning conductor lines are selected group by group. Meanwhile, when the transistors SW.sub.11 to SW.sub.n4 are turned off, transistors P.sub.1 through P.sub.N connected to the corresponding scanning conductor lines G(1) through G(N) are turned on (by signals I and J), and a constant voltage is applied to the scanning conductor lines G(1) through G(N) to achieve sufficient discharge of electricity.
In the display device shown in FIG. 2, the number of connection terminals of the scanning line drive circuit 5 is smaller than the number of the scanning conductor lines G(1) through G(N). However, since the whole length of the conductor lines arranged between the scanning line drive circuit 5 and a display board 1 are long, the resistance of the conductor lines made of a thin film increases, and therefore the conductor lines may catch noise to cause the malfunction of the display device or the deterioration of the display image quality.
Furthermore, in the display device shown in FIG. 2, since the scanning line drive circuit 5 and the signal line drive circuit 2 are arranged in two different directions with respect to the display board 1, two connection steps are required for the connection between the display board 1 and the drive circuit boards. When occasion demands, a junction board 9 for transmitting timing signals and other signals must be provided, and therefore connection between the junction board and the drive circuit boards is required.
FIG. 4 shows a display device assembling process where the display device shown in FIG. 2 is coupled with a junction board.
First, a connection material (anisotropic conductive film or the like) for connecting display conductor lines S(1) through S(M) on the display board (display panel) 1 with the signal line drive circuit 2 is supplied to either the display board 1 or to a signal line drive circuit board (not shown) (step S1).
Then the signal line drive circuit board is placed adjacently along a side of the display board 1. That is, the signal line drive circuit board is aligned with the display board 1 (step S2). Then the signal line drive circuit board is connected with the display board so that the display conductor lines S(1) through S(M) on the display board 1 and output terminals of the signal line drive circuit 2 are connected with each other by way of the connection material (step S3). Then the display board 1 is turned by an angle of 90.degree. (step S4).
In the same manner as described above, the ramification conductor lines A, B, C, and D, the control conductor lines E(1) through E(n), and the other conductor lines on the display board 1 are connected with output terminals of the scanning line drive circuit 5 by means of a connection material (steps S5-S7). Then the display board 1 with the signal line drive circuit board and the scanning line drive circuit board is transferred (step S8).
Subsequently, a connection material is supplied to either the junction board or the scanning line drive circuit board (step S9), alignment of both boards is performed (step S10), and conductor lines of the junction board are connected to the input terminals of the scanning line drive circuit 5 (step S11). Then the display board 1 in this condition is transferred (step S12). In the same manner as described above, a connection material is supplied to either the junction board or the signal line drive circuit 2 (step S13), alignment of both boards is performed (step S14), and conductor lines of the junction board are connected to the input terminals of the signal line drive circuit 2 (step S15). As described above, there are problematically many processes for the assembling (note that the alignment process at step S14 can be eliminated).
As is evident from the above, the assembling procedure has a lot of steps and is troublesome. This results in a cost increase.
Furthermore, since the conductor lines A-D, E(1)-E(n), and I and J occupy a wide non-display area on the display board and also since the circuit extends in two directions with respect to the display screen, the resulting module disadvantageously has a large size and heavy weight after assembling.
Furthermore, since the operation frequencies of the transistors P.sub.1 through P.sub.N are high, they possibly operate faultily.
Furthermore, the display device shown in FIG. 2 has many intersections of the conductor lines, which results in a reduced yield of the products.